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  rev. a information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. a lc 2 mos, high speed 1-, 4-, and 8-channel 10-bit adcs AD7776/ad7777/ad7778 * functional block diagrams cs rd wr busy/int agnd db0?b9 AD7776 10 dgnd clkin 10 control register adcreg1 t/h refout refin ref agnd c refin rtn v swing v bias a in 1 mux refin 10-bit adc control logic v cc agnd db0?b9 ad7777 10 control register dgnd clkin 10 adcreg2 adcreg1 t/h 1 refout refin ref agnd c refin v swing v bias a in 1 a in 2 a in 3 a in 4 mux 1 refin t/h 2 mux 2 10-bit adc control logic v cc rtn agnd db0?b9 ad7778 10 control register dgnd clkin cs rd wr busy/int 10 adcreg2 adcreg1 t/h 1 refout refin ref agnd c refin v swing v bias a in 1 a in 2 a in 3 a in 4 a in 5 a in 6 a in 7 a in 8 mux 1 refin t/h 2 mux 2 10-bit adc control logic v cc rtn features AD7776: 1-channel ad7777: 4-channel ad7778: 8-channel fast 10-bit adc: 2.5  s worst case +5 v only half-scale conversion option fast interface port power-down mode applications hdd servos instrumentation general description the AD7776/ad7777/ad7778 are a family of high speed, mul tichannel, 10-bit adcs primarily intended for use in r/w head positioning servos found in high density hard disk drives. they have unique input signal conditioning features that make them ideal for use in such single supply applications. by setting a bit in a control register within both the four-channel version, ad7777, and the eight-channel version, ad7778, the input channels can either be independently sampled or any two channels can be simultaneously sampled. for all versions, the specified input signal range is of the form v bias v swing . how ever, if the rtn pin is biased at, for example, 2 v the a nalog i nput signal range becomes 0 v to +2 v for all input channels. this is covered in more detail under the section changing the analog input voltage range. the voltage v bias is the offset of the adc? midpoint code from ground and is sup plied either by an onboard reference available to the user (refout) or by an external voltage reference applied to refin. the full-scale range (fsr) of the adc is equal to 2 v swing where v swing is nominally equal to refin/2. addi- tionally, when placed in the half-scale conversion mode, the value of refin is converted. this allows the channel offset(s) to be measured. control register loading and adc register reading, channel select and conversion start are under the control of the p. the twos complement coded adcs are easily interfaced to a standard 16-bit mpu bus via their 10-bit data port and standard microprocessor control lines. the AD7776/ad7777/ad7778 are fabricated in linear compat- ible cmos (lc 2 mos), an advanced, mixed technology process that combines precision bipolar circuits with low power cmos logic. the AD7776 is available in a 24-lead soic package; the ad7777 is available in both 28-lead dip and 28-lead soic packages; the ad7778 is available in a 44-lead pqfp package. * protected by u.s. patent no. 4,990,916. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 617/329-4700 www.analog.com fax: 617/326-8703 ? analog devices, inc., 2002
rev. a C C busy / int i sin i surc s c s c dc c t c ic inuts dbdb cs wr rd cin i in i in i c i c cnrsin tiin t cin s t cin s c cin d c cin cin / / i c cin cin t cin cin t cin wr ruirnts cc r / / s i cc n cs rd cr i cc d cr c u t s d dynic rrnc s t s n d s/nd r b in s s w sin t d td b in s s w sin i d id b sin b s s w s cc i b in s s w sin nts t c c sb swin / swin s cc nd dnd
AD7776/ad7777/ad7778 C C busy int t i i ut b bt s bb t s bb t t in t u t inttiin cs wr rd wr rd r cs r wr cs rd d t w b r t rd d wr r d wr r wr r busy cin cr cin wr r busy r int cin s c cr cin d c cr wr rd int r cr nts s t t s
AD7776/ad7777/ad7778 C C cs rd wr cin dbdb busy / int dnd cc i nd cc rut nd cc rin nd cc t r c c s t r c c t c di d w t i c/w t s c sic d w t i c/w t s c i c rdrin uid t n r c dr c c rw dn c c n dr c c rw ds c c s r sic n di s d w t i c/w t s c i c s t in cniurtins t iw n s d nc nc nc nc nc nc nc nc nc nc nc nc nc db db dnd db db db db db db c rin rtn nd rin in in in in in in in in nd rut cc db sb db cin busy/int rd wr cs nc n cnnct sic t iw n s d db db dnd db db db db db db c rin nd rtn rin in nd rut cc db sb db cin busy/int rd wr cs di sic t iw n s d nc nc n cnnct db db dnd db db db db db db db sb db busy/int c rin nd rtn rin nd rut cc cin rd wr cs in in in in warning! esd sensitive device caution esd (electrostatic discharge) sensitive device. electrostatic charges as high as 4000 v readily accumulate on the human body and test equipment and can discharge without detection. although the AD7776/ad7777/ad7778 feature proprietary esd protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. therefore, proper esd precautions are recommended to avoid performance degradation or loss of functionality.
AD7776/ad7777/ad7778 C C busy/int b/i /d t cr i cr busy / int busy t busy busy i cr busy / int intrrut t int w cr wr rd int cs c s i t wr w i i cs d wr wr rd r i i cs dc in i t bis swin bis swin rin i nd rin r i t d/d/d t rin bis swin bis rin swin rin/ i rin nd rut r t i bis c rin r d c nd dc rtn s r n rtn nd circuit dscritin dc t bis swin t bis t bis rin t rut t bis / rin/ w rin dc bis swin t dc b bis t dc swin s bis swin sb bis swin sb dc utut cd bis swin bis bis swin n inut in dc t
AD7776/ad7777/ad7778 C C busy / int cr busy int cntrristr t d crcr dcrcr i crcr cd crcr d cr cr cr s in dc d cr cr cr s in s in s in s in dc d cr cr cr s in s in s in s in s in s in s in s in crcr c ddcrcr d cr cr cr s in s in s in s in dc
AD7776/ad7777/ad7778 C C wr dc in t cin cin i d cin i d cin sb t cin t cin sb t cin cr busy / int cr sr dcr t sr i cr busy / int dc busy / int cr sr dcr d cin in wr cnn cuisitin ty ty d db sb tiin swn r d rtr tn dc c s t t t t/ d/d/d dc n dc t b d t d/d/d cr t cr i wr busy / int t rut c cs wr rd d/d/d i d/d/ d dc dcr dcr cr u dc t b nd s rin nd i s rut nd d cs wr rd cc cin cc s busy / int t d/d/d cr n
AD7776/ad7777/ad7778 C C * additional pins omitted for clarity address bus data bus d15ed0 tms320c10-20.5 tms320c14-25 a11ea0 we ( c10) den ( c14) ren cs db9edb0 rd wr AD7776/ ad7777/ ad7778 * addr decode figure 7. AD7776/ad7777/ad7778 to tms320c10 and tms320c14 interface address bus data bus * additional pins omitted for clarity cs db9edb0 rd wr d15ed0 a15ea0 is ready msc strb r/w tms320c25-40 addr decode AD7776/ ad7777/ ad7778 * figure 8. ad 7776/ad7777/ad7778 to tms320c25 in terface figure 10 shows the interface with the 80c196kb at 12 mhz and the 80c196kc at 16 mhz. one wait state is required with the 16 mhz machine. the 80c196 is configured to operate with a 16-bit multiplexed address/data bus. table i provides a truth table for the AD7776/ad7777/ad7778 and summarizes their microprocessor interfacing features. note that a read instruction to any of the devices while a conversion is in progress immediately stops that conversion and returns un reliable data over the data bus. * additional pins omitted for clarity address bus data bus cs db9edb0 rd wr d23ed6 a13ea0 wr rd adsp-2101-50 adsp-2105-40 addr decode en dms AD7776/ ad7777/ ad7778 * figure 9. AD7776/ad7777/ad7778 to adsp-2101 and adsp-2105 interface * additional pins omitted for clarity data bus (10) cs db9edb0 AD7776/ ad7777/ ad7778 * rd wr address bus wr rd 80c196kb-12 80c196kc-16 ad15ead6 (port 4) ale ?373 latch addr decoder ad7ead0 (port 3) figure 10. AD7776/ad7777/ad7778 to 80c196 interface
AD7776/ad7777/ad7778 C C cs rd wr dbdb c di j k k kk k k busy / int d/d/d d/d/d wr busy / int t cr dc c t cin cin wr triny r d/d/d sb dc dc d n d sb sb b dc bis t bis sb b t t sb s t dc bis rin nd dc bis swin sb sb bis swin sb n dc s t t sb
AD7776/ad7777/ad7778 C C 20 2 2 3 2 4 2 5 2 6 2 12 1 log vvvvv v ++++ () where v 1 is the rms amplitude of the fundamental and v 2 , v 3 , v 4 , v 5 , and v 6 are the rms amplitudes of the individual harmonics. intermodulation distortion, imd with inputs consisting of sine waves at two frequencies, fa and fb, any active device with nonlinearities creates distortion products, of order (m + n), at sum and difference frequencies of mfa + nfb, where m, n = 0, 1, 2, 3. intermodulation terms are those for which m or n is not equal to zero. for example, the second order terms include (fa + fb) and (fa e fb) and the third order terms include (2 fa + fb), (2 fa e fb), (fa + 2 fb), and (fa e 2 fb). channel-to-channel isolation channel-to-channel isolation is a measure of the level of cross- talk between channels. it is measured by applying a full-scale 100 khz sine wave signal to any one of the input channels and monitoring the remaining channels. the figure given is the worst case across all channels. digital signal processing applications in digital signal processing (dsp) application areas like voice recognition, echo cancellation, and adaptive filtering, the dynamic characteristics s/(n+d), thd, and imd of the adc are criti cal. the AD7776/ad7777/ad7778 are specified dynamically as well as with standard dc specifications. because the track/hold ampli fier has a wide bandwidth, an antialiasing filter should be placed on the analog inputs to avoid aliasing high frequency noise back into the bands of interest. the dynamic performance of the adc is evaluated by applying a sine wave signal of very low distortion to a single analog input which is sampled at 380.95 khz. a fast fourier transform ( fft) plot or histogram plot is then generated from which the signal to noise and distortion, harmonic distortion, and dynamic differen tial nonlinearity data can be obtained. similarly, for intermodulation distortion, an input signal consisting of two pure sine waves at different frequencies is applied to the AD7776/ad7777/ ad7778. figure 11 shows a 2048-point fft plot for a single channel of the ad7778 with an input signal of 99.88 khz. the snr is 58.71 db. it can be seen that most of the harmonics are buried in the noise floor. it should be noted that the harmonics are taken into account when calculating the s/(n+d). 0 e90 e80 0 e60 e40 e20 99.88 signal amplitude e db frequency e khz input frequency = 99.88khz sample frequency = 380.95khz snr = 58.7db t a = 25  c figure 11. adc fft plot the relationship between s/(n+d) and resolution (n) is ex- pressed by the following equation: sn d n db + () =+ () 602 176 .. this is for an ideal part with no differential or integral linearity errors. these errors cause a degradation in s/(n+d). by work- ing backwards from the above equation, it is possible to get a measure of adc performance expressed in effective number of bits (n). n effective sn ddb () = + ()() ? 176 602 . . the effective number of bits plotted versus frequency for a single channel of the ad7778 is shown in figure 12. the effec- tive number of bits is typically 9.5. 10.0 7.5 189.2 9.0 8.0 8.5 0 9.5 input frequency e khz effective number of bits sample frequency = 378.4khz t a = 24  c figure 12. effective number of bits vs. frequency
AD7776/ad7777/ad7778 C C vt ov refin offset offset + () where 0 v  v offset  1 v. to produce this range, the rtn pin must be biased to (refin e 2 v offset ). for instance, if outline dimensions 24-lead standard small outline package [soic] wide body (rw-24) dimensions shown in millimeters and (inches) controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design compliant to jedec standards ms-013ad 0.32 (0.0126) 0.23 (0.0091) 8  0  0.75 (0.0295) 0.25 (0.0098)  45  1.27 (0.0500) 0.40 (0.0157) seating plane 0.30 (0.0118) 0.10 (0.0039) 0.51 (0.020) 0.33 (0.013) 2.65 (0.1043) 2.35 (0.0925) 1.27 (0.0500) bsc 24 13 12 1 10.65 (0.4193) 10.00 (0.3937) 7.60 (0.2992) 7.40 (0.2913) 15.60 (0.6142) 15.20 (0.5984) coplanarity 0.10 28-lead standard small outline package [soic] wide body (rw-28) dimensions shown in millimeters and (inches) controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design compliant to jedec standards ms-013ae 0.32 (0.0126) 0.23 (0.0091) 8  0  0.75 (0.0295) 0.25 (0.0098)  45  1.27 (0.0500) 0.40 (0.0157) seating plane 0.30 (0.0118) 0.10 (0.0039) 0.51 (0.0201) 0.33 (0.0130) 2.65 (0.1043) 2.35 (0.0925) 1.27 (0.0500) bsc 28 15 14 1 18.10 (0.7126) 17.70 (0.6969) 10.65 (0.4193) 10.00 (0.3937) 7.60 (0.2992) 7.40 (0.2913) coplanarity 0.10
AD7776/ad7777/ad7778 C C C C


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